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EXEMPLAR SYNTHESIS LIBS/INTRFC |
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MAINT EXEMPLAR SYNTHESIS |
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MENTOR V8 LIBRARIES/INTERFACE |
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Microchip Technology |
MENTOR V8 LIBRARIES/INTRFC MAINT |
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SYNOPSYS LIBRARIES/INTRFC MAINT |
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Microchip Technology |
SYNOPSYS LIBRARIES/INTRFC MAINT |
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CADENCE VERILOG LIB/INTRFC MAINT |
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CADENCE LIRARIES/INTRFC MAINT |
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INTEGRAPH SCHEM SYNTH/SIM MAINT |
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Microchip Technology |
ATMEL SYNARIO VHDL SYNTHESIS OPT |
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UNIV AT6000 PHYSICAL DESIGN SYS |
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FPGA DESIGN SYSTEM W/VIEWDRAW |
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Microchip Technology |
FPGA VIEWLOGIC-BASED INTRMED UPG |
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Microchip Technology |
UNIVER DESIGN SYS VWDRAW/VIEWSIM |
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Microchip Technology |
FPGA DESIGN SYS W/VWDRAW/VIEWSIM |
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6,500
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Microchip Technology |
FPGA VIEWLOGIC-BASED INTRMED UPG |
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6,500
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Microchip Technology |
DESIGN SYS PWRVW SCHEMATIC ENTRY |
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6,500
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